Creating Interconnects Between Transistors Interconnects Fabrication requires:  Lines make lateral  Barrier to block connections within each Line copper diffusion layer; vias connect layers Via  Liner to improve Barrier copper adhesion Chips have >50 miles of on Cu  Seed layer for Line copper growth copper interconnect wiring  Copper fill to com plete wire Resistance impacts power Barrier layers increase via resistance, cause and performance RC delays, waste power