The New Playbook ENABLED BY KEY INFLECTIONS New ASICs and accelerators New architectures New memory / in-memory compute Specialty, CIS, power GAA transistors New structures / 3D Backside power distribution 3D NAND, 3D DRAM Gate New materials Contact Interconnect EUV enablement New ways to shrink Materials-enabled patterning 3D patterning control High-bandwidth memory Advanced packaging 2.5D silicon interposer 3D TSV, hybrid bonding
New Ways to Wire and Integrate Chips Page 53 Page 55