Future of Logic Scaling PPA Improvements Scaling Benefits 6 4 ↑3.5x 2 0 Performance 3.5x ↑ -2 Performance ? Area -4 Power ↓5.5x -6 ↓6.0x Power 6.0x ↓ 16/12nm 2nm -8 Planar (FinFET) 7nm 3nm (GAA) -1 0 Area 5.5x ↓ Intrinsic Intrinsic scaling scaling + 40% DTCO + >50% DTCO ? 5th Gen FinFET GAA or Variants Next Gen Planar (5nm) (2nm) Area Scaling
New Ways to Wire and Integrate Chips Page 25 Page 27