Opportunity: Heterogeneous SRAM Integration g n i al c ea S r A SRAM SRAM cache memory is key to performance Limited 2D scaling of SRAM impacts die size and yield Logic 28nm 16nm 10nm 7nm 5nm 3nm 2nm Source: Naffziger, VLSI Short Course, 2020 SRAM: Static Random Access Memory Source : Yole Développement